Field of the Invention
The invention relates to a package substrate, a manufacturing method thereof and a package. More particularly, the invention relates to a package substrate manufactured by using a three-dimensional (3D) printing technique, a manufacturing method thereof and a package.
Description of Related Art
In a package process of a semiconductor device, a wire frame of the related art is usually restricted by a single-layer structure and manufacturing requirements of the wire frame from unlimitedly designing a circuit of the wire frame.
Additionally, for semiconductor package using a substrate designed with wire winding, conductive vias have to be configured on the substrate for connecting circuits of different layers. A via is generally formed by processing on the substrate using a computer numerical control (CNC) machine or laser, which requires several processes, such as thinning, drilling, rubbing, depositing, electroplating, filling and so on, for implementing mutual connection of wires. The aforementioned manufacturing method disadvantages in not only its complexity, but also material consumption and affection to the environment.